The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 21, 1995

Filed:

Nov. 29, 1993
Applicant:
Inventors:

John M Neilson, Norristown, PA (US);

Carl F Wheatley, Jr, Drums, PA (US);

Frederick P Jones, Mountaintop, PA (US);

Victor A Temple, Clifton, NY (US);

Assignee:

Harris Corporation, Melbourne, FL (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
257341 ; 257139 ; 257328 ;
Abstract

A pattern for a wafer for a MOS-gated semiconductor device includes plural ribbons extending from a source contact region to another source contact region, each of the ribbons having a single source region between two channel regions, so as to increase the device's current-carrying capability per unit area relative to the prior art. The pattern increases the size of the active current-carrying area (the channel and neck regions of the device) relative to the area of the source contact areas. The source contact regions may be discrete or linear, and the ribbons may extend therefrom perpendicularly or at other angles.


Find Patent Forward Citations

Neilson, John. (1995). Mesh geometry for mos-gated semiconductor devices (U.S. Patent No. 5399892). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5399892

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…