The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 21, 1995

Filed:

Feb. 25, 1994
Applicant:
Inventors:

William H Lytle, Chandler, AZ (US);

Tien-Yu T Lee, Scottsdale, AZ (US);

Bennett L Hileman, Tempe, AZ (US);

Assignee:

Motorola, Inc., Schaumburg, IL (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
C25D / ; C25D / ; C25D / ;
U.S. Cl.
CPC ...
205123 ; 205148 ; 205266 ; 2042 / ; 204238 ; 204275 ; 204284 ; 204292 ;
Abstract

An apparatus plates metal bumps of uniform height on one surface of a semiconductor wafer (32). A plating tank (12) contains the plating solution. The plating solution is filtered (16) and pumped (14) through an inlet (22) to an anode plate (24) within plating cell (20). The anode plate has a solid center area to block direct in-line passage of the plating solution, and concentric rings of openings closer to its perimeter to pass the plating solution. The distance between the inlet and the anode plate is adjustable with supports to create a uniform flow of the plating solution to the surface of the semiconductor wafer for uniform plating of the array of metal bumps (30). The plating cell contains an adjustable sidewall extension (26) to set the proper distance between the anode plate and the semiconductor wafer.


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Lytle, William. (1995). Adjustable plating cell for uniform bump plating of semiconductor wafers (U.S. Patent No. 5391285). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5391285

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