The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 07, 1995
Filed:
Apr. 06, 1992
James C Lee, Santa Clara County, CA (US);
Arshad Ahmad, Santa Clara County, CA (US);
Chune Lee, San Francisco County, CA (US);
Myrna E Castro, Santa Clara County, CA (US);
Francisca Tung, Santa Clara County, CA (US);
Digital Equipment Corporation, Maynard, MA (US);
Abstract
A method of forming a multilayer circuit board is disclosed which includes a build-up process in which, beginning with a solidified layer of the dielectric disposed upon a substrate, alternate layers of conducting metal and dielectric are sequentially deposited. Each layer of conducting metal lines is defined using photoresist and a photolithographic technique. After the lines are deposited, the photoresist is removed and a second layer of photoresist defines the conductive posts which function as through holes between metal layers. After each layer of conductive line and posts is formed, and the photoresist is removed, the dielectric is flowed into place and solidified to insulate adjacent metal lines and posts. The process may be repeated as many times as necessary to build up layers of conducting metal and dielectric, and form the completed multilayer wiring board.