The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 31, 1995
Filed:
Jun. 18, 1993
Chii-Fa Chiou, Lake Forest, CA (US);
Yuji Isobe, Kawasaki, JP;
Silicon Systems, Inc., Tustin, CA (US);
Abstract
A write driver to operate inductive heads for magnetic recording is disclosed. The inductive recording head is coupled between first and second outputs of a first write driver block. The first and second outputs of the first write driver block are coupled to first and second inputs of a second write driver block, respectively. First and second current sources are coupled to third and fourth inputs of the second write driver block, respectively. A first switching block is coupled to the first current source and to the third input of the second write driver block. A second switching block is coupled to the second current source and to the fourth input of the second write driver block. A first input signal is provided to a first input of the first write driver block and to the first switching block. A second input signal is provided to a second input of the first write driver block and to the second switching block. The second output of the first write driver block, the inductive recording head and the first input of the second write driver block form a first current path when the first input signal is greater than the second input signal. Conversely, the first output of the first write driver block, the inductive recording head and the second input of the second write driver block form a second current path when the second input signal is greater. The first and second input signals may be CMOS or differential ECL signals.