Semiconductor integrated circuit device having a memory and an

Abstract

A semiconductor integrated circuit device includes a memory cell array for storing data to be processed, and an operational unit for effecting a predetermined operation on the data read from the memory cell array. The memory cell array has first and second regions for storing first and second data words of first and second groups. The first data words and second data words each include a plurality of data bits. The first region includes a plurality of bit arrays for storing data bits of the same digit in the first data words, and the second region includes a plurality of bit arrays for storing data bite of the same digit in the second data words. The bit arrays of the first and second groups are arranged alternately in the order of digits of the data words. The bit arrays storing the data bits of the same digit form one subarray. The data bits in one data word are stored in the same positions of the bit arrays. The operational unit includes operational circuits each corresponding to one of the subarrays. Each operational circuit effects the predetermined operation on the data read from the two bit arrays in the corresponding subarray. Each bit array has selectors responsive to external addresses to select one column from each bit array and connect this column to a corresponding operational circuit.