The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 13, 1994

Filed:

Jan. 25, 1993
Applicant:
Inventors:

Charles W Stager, Austin, TX (US);

Paul M Winebarger, Austin, TX (US);

Gregory S Ferguson, Austin, TX (US);

Christopher A Turman, Austin, TX (US);

Assignee:

Motorola, Inc., Schaumburg, IL (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
156626 ; 156627 ;
Abstract

A method for planarizing a layer (18) begins by forming a layer (18) over a wafer having a substrate (12). Layer (18) has a surface topography which is not planar. A layer of material (20) is formed over the layer (18). The layer of material (20) has a surface which is more planar than the surface of layer (18). The surface of material (20) is transferred into the layer (18) by etching the layer (18) and the material (20) at approximately the same etch rate. The same etch rate is achieved by monitoring one of either the surface of the wafer or the etch environment of an etch system chamber. A computer-controlled feedback path alters an etch chemistry or etch environment to maintain the etch rates within an etch rate tolerance which is also referred to as a process window. By monitoring and altering the etch environment and/or the etch chemistry to maintain a process window, an optimal planar surface is achieved for layer (18).


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