Low voltage compound modulated integrated transistor structure

Abstract

Disclosed is an integrated transistor structure having increased conductance and operating speed including a complementary insulated gate field-effect transistor pair, each including a source and drain region with a gate contact positioned therebetween, ohmic contacts to the source and drain regions, and a p-n junction contact to each of the drain regions. The gates of the two transistors are interconnected and function as the input terminal, and the two p-n junction contacts are interconnected as the output of the device. The operation of the device is such that the lightly-doped drain regions act as bases of bipolar transistors, with the emitters formed by the p-n junction diodes. Minority carriers injected by the diodes modulate the channel regions, thereby lowering their resistivity and increasing the transconductance of the device without increasing the physical size or the capacitance of the device and thereby improving the speed of the device. Second p-n junction contacts to the drain regions are interconnected, and form auxiliary bipolar transistors in the drain regions to extract charge stored in the main transistor collector to base junction and increasing switching speed in the turn off direction. In turn on, the second p-n junction holds the base away from ground thereby increasing turn on speed.