The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 01, 1994

Filed:

May. 10, 1993
Applicant:
Inventors:

George A Kosonocky, Placerville, CA (US);

Mark D Winston, El Dorado Hills, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ; G11C / ;
U.S. Cl.
CPC ...
395425 ; 36518902 ; 36518904 ; 36523003 ; 365218 ; 365900 ; 365185 ; 364D / ;
Abstract

A microprocessor system includes a central processing unit (CPU) and a nonvolatile memory having a first memory array and a second memory array. A first address register is provided for storing a first address for the first memory array. A second address register is provided for storing a second address for the second memory array. Array select circuitry responsive to an incoming address is provided for selecting the first memory array for a reprogramming operation and the second memory array for a read operation. A multiplexer has inputs coupled to the first memory array and the second memory array for selectively coupling one of the first memory array and the second memory array to an output of the memory. The array select circuitry directs the first address to the first memory array and the second address to the second memory array. The array select circuitry controls the multiplexer to couple the second memory array to the output during the reprogramming operation of the first memory array. The memory further includes a write state machine for controlling reprogramming of the memory. The write state machine allows write automation of the nonvolatile memory.


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