Formation of uniform dimension conductive lines on a semiconductor wafer

Abstract

A method for forming uniformly sized features, such as polysilicon lines or gates, or such as conductive lines, on a semi conductor wafer having a planar upper surface is described which minimizes variations in the critical dimensions of the features. The technique allows a substantially uniform overlying layer, such as photoresist, to be formed above the layer intended to contain the features. The method can be applied to forming isolation trenches around active areas on the semiconductor wafer, overfilling the trenches with an insulating material (e.g., oxide), polishing back the oxide to a planar surface, depositing a planar layer of a conductive material (e.g., poly), and depositing a planar layer of a photoresist. The planar layer of photoresist, being deposited over a planar layer of conductive material has substantially uniform thickness and correspondingly uniform reflectivity. As a result, conductive lines formed by photolithographic processing of the underlying conductive material are substantially uniform in both width and thickness.