The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 20, 1994

Filed:

Nov. 26, 1991
Applicant:
Inventors:

Seiji Kaneko, Yokohama, JP;

Toshiyuki Kinoshita, Sagamihara, JP;

Akio Yamamoto, Sagamihara, JP;

Yasuhisa Tamura, Sagamihara, JP;

Assignee:

Hitachi, Ltd., Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
395650 ; 3642303 ; 364D / ;
Abstract

A task scheduling method for a multiprocessor in a computer system having a main storage unit and a plurality of instruction processors each having a buffer storage unit, the buffer storage unit having a copy of a part of the main storage unit and deleting a part of the copy when reading a main storage unit area not stored in the buffer storage unit. The task scheduling method is accomplished by providing each task control block of a task control block queue with an area for storing processor identification of an instruction processor which executes a task and an area for storing evaluation information for evaluating a copied data amount for the task, remaining in the buffer storage unit of the instruction processor executing the task; causing the instruction processor to register the processor identification and evaluation information in the task control block when execution of the task is stopped; and when selecting a task to be executed by a subject instruction processor from a plurality of tasks to be executed in the computer system, causing the subject instruction processor to sequentially read task control blocks in the task control block queue to check each task in accordance with the processor identification and evaluation information, and if a checked result shows that the copied data amount corresponding to a checked task and remaining in the buffer storage unit of the instruction processor is greater than a predetermined amount, causing the subject instruction processor not to select the checked task and allowing another instruction processor to select the checked task.


Find Patent Forward Citations

Kaneko, Seiji. (1994). Task scheduling method in a multiprocessor system where task selection (U.S. Patent No. 5349656). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5349656

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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