The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 06, 1994
Filed:
Jun. 30, 1993
Marc Landgraf, Folsom, CA (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A reset circuit in a system comprising a microprocessor coupled to a flash memory by a system bus. The reset circuit has a reset signal generation circuit, a sleep signal generation circuit and a reset override signal generation circuit. The reset signal generation circuit generates a reset signal when power is applied to the flash memory. The reset signal causes the flash memory to enter a predetermined reset state. The sleep signal generation circuit is coupled to the reset signal generation circuit. The sleep signal generation circuit generates a sleep signal. The sleep signal causes the reset signal generation circuit to enter an energy saving sleep mode when the flash memory is placed in the sleep mode. The reset signal causes the sleep signal generation circuit to reset and suppress generation of the sleep signal. The reset override signal generation circuit is coupled to the reset signal generation circuit. The reset override signal is generated during power-up. The reset override signal forces the reset signal generation circuit to generate the reset signal during power-up even if the reset signal generation circuit is receiving the sleep signal. The reset signal override circuit draws substantially no power when the flash memory is placed in the sleep mode.