The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 09, 1994
Filed:
Oct. 26, 1992
Akira Matsuda, Annaka, JP;
Shigeki Shudo, Annaka, JP;
Noboru Shimamoto, Annaka, JP;
Kohichi Tanaka, Takasaki, JP;
Hiromasa Hashimoto, Fukushima, JP;
Fumio Suzuki, Gunma, JP;
Shin-Etsu Handotai Co., Ltd., Tokyo, JP;
Abstract
A method of chucking semiconductor wafers, in which a silicone elastic layer with high flatness is formed on the surface of a hard substrate having fine through-holes for vacuum chucking. Next fine through-holes in the silicone elastic layer, are provided, each through-hole communicating with the fine through-holes of the hard substrate. Next a semi-conductor wafer is held on the hard substrate by vacuum chucking from the back side of the substrate, so as to hold the semiconductor wafer securely on the substrate only by surface adhesion of the silicone elastic layer during polishing of the wafer. This method does not require wax or similar adhesive for holding the semiconductor wafer on the hard surface during the polishing process, and can realize a high-precision and high-quality surface polishing process for the semiconductor wafers.