The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 02, 1994

Filed:

Apr. 30, 1992
Applicant:
Inventors:

George W Doerre, Poughkeepsie, NY (US);

Seiki Ogura, Hopewell Junction, NY (US);

Nivo Rovedo, La Grangeville, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
156636 ; 148D / ; 156635 ; 156645 ; 156648 ; 156649 ; 437 61 ; 437 78 ;
Abstract

An SOI wafer has a device layer of initial thickness that is formed into a set of mesas in the interval between which a temporary layer of polysilicon is deposited to a precisely controlled thickness. This polysilicon is entirely converted in a self-limiting process to an oxide etch stop having a thickness much smaller than the initial thickness. The mesas are thinned by a chemical mechanical polishing technique until the mesa is the same level as the top surface of the new oxide. The etch stop layer of oxide is not removed but serves both as an isolating layer to provide dielectric isolation between mesas in the final circuit and also as a visual gauge to determine the time when the polishing process should stop.


Find Patent Forward Citations

Doerre, George. (1994). Method of forming thin silicon mesas having uniform thickness (U.S. Patent No. 5334281). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5334281

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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