The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 26, 1994

Filed:

Dec. 30, 1992
Applicant:
Inventor:

Jay J Sturges, Orangevale, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
371 223 ; 371 221 ;
Abstract

A method in which the boundary-scan circuitry of a boundary-scan chain is placed in a first condition in which each bit of a series of bits will traverse a path through an equipment identification register if one exists or will require one clock to traverse each device in the boundary-scan chain in which no complete identification register exists. A first recognizable series of bits is sent through the chain and the beginning of the series of bits is detected at the output of the chain while a count is kept at the output to determine the number of individual boundary-scan circuits in the chain. The count is incremented by one for each identification register traversed or for each circuit which has no such complete register. The boundary-scan chain is then placed in a second condition in which each bit of a series of bits will traverse the instruction registers of the individual boundary-scan circuits in the boundary-scan chain, and a second recognizable series of bits is sent through the chain and counted until the a detectable portion of the second series of bits appears at the output of the boundary-scan chain. This count indicates the total number of bits in the instruction registers in the chain.


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