The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 19, 1994
Filed:
Mar. 16, 1993
Benjamin J McCarroll, Portland, OR (US);
Tektronix, Inc., Wilsonville, OR (US);
Abstract
A fully differential CMOS peak detection circuit has a differential input stage and a negative feedback loop that form a differential unity gain feedback amplifier. The differential output of the differential input stage is applied to a differential peak detect circuit having a pair of series diode/capacitor combinations. The diode/capacitor junctions are applied to differential inputs of the negative feedback loop. A common mode correction circuit is coupled to the differential CMOS peak detection circuit to minimize differences between the common mode voltages of the differential input stage and the negative feedback loop. The differential peak voltage is held at the differential output of the differential input stage for sampling by a sampling circuit during a readback interval, and then tracks a differential input signal applied to the differential input of the differential input stage during a tracking interval. The differential peak detection circuit then peak detects during a peak detect interval that is equal to a desired sample time window.