The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 12, 1994
Filed:
Sep. 06, 1991
Hitachi, Ltd., Tokyo, JP;
Abstract
The first and second flip-flop circuits are connected in series included within a combinational logic for carrying out a delay test. The first and second flip-flop circuits are provided with control pins, system clock pins, scan clock pins, system data pins and scan data pins, respectively. A delay time propagated from the first flip-flop circuit to the second flip-flop circuit through the path of the combinational logic to be tested is measured by detecting an input time to the first flip-flop circuit by the system clock signal to the first flip-flop circuit in response to an input signal to the control pins and a time stored in the second flip-flop circuit corresponding to output system data from the first flip-flop circuit. By measuring the delay time, whether the combinational logic is normal or abnormal is detected.