The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 12, 1994
Filed:
Aug. 27, 1992
Michael D Lammert, Manhattan Beach, CA (US);
TRW Inc., Redondo Beach, CA (US);
Abstract
This invention discloses a process by which a silicon bipolar transistor can be fabricated having a polysilicon emitter region and a polysilicon base region by a single polysilicon deposition step. After conventional fabrication of the substrate, collector and base layers, a first dielectric layer is deposited over the developing wafer structure. The first dielectric layer is then etched in order to define polysilicon emitter, base and collector regions. Next, a polysilicon layer is deposited over the first dielectric layer and the etched regions. A planarization layer is deposited over the polysilicon layer, and the planarization layer and the polysilicon layer are etched so that polysilicon only remains in the defined polysilicon emitter, base and collector regions. The polysilicon emitter, base and collector regions are then implanted with dopants to provide the appropriate interfaces. A second dielectric layer is deposited over the first dielectric layer and the polysilicon regions and is etched to open contacts to the polysilicon emitter, base and collector regions. A metallization layer is then deposited and etched to contact the polysilicon emitter, base and collector regions.