The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 14, 1994
Filed:
Apr. 09, 1990
Applicant:
Inventors:
John H Crawford, Santa Clara, CA (US);
Paul S Ries, San Jose, CA (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
395400 ; 395425 ; 364D / ; 364243 ; 3642434 ; 36424341 ; 3642563 ; 3642564 ; 3642565 ;
Abstract
Microprocessor architecture for an address translation unit which provides two levels of memory management is described. Segmentation registers and an associated segmentation table in main memory provide a first level of memory management which includes attribute bits used for protection, priority, etc. A page cache memory and an associated page directory and page table in main memory provide a second level of management with independent protection on a page level.
Crawford, John. (1994). Virtual memory management method and apparatus utilizing separate and (U.S. Patent No. 5321836). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5321836
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