The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 14, 1994

Filed:

Jul. 01, 1992
Applicant:
Inventors:

Robert H Eklund, Plano, TX (US);

Robert H Havemann, Garland, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ;
U.S. Cl.
CPC ...
437 31 ; 437 39 ; 437178 ; 437200 ;
Abstract

This invention is a silicon bipolar integrated circuit comprising: a high barrier Schottky diode clamp on a bipolar transistor, the diode clamp comprising a self-aligned PtSi layer on a silicon surface; and a TiN local interconnect partially overlying the PtSi layer. It also is a method of manufacturing an integrated circuit comprising: forming a self-aligned PtSi layer on the adjacent base and collector silicon regions, the PtSi serving as a clamp diode on the bipolar transistor; and forming an etch-patterned TiN layer partially overlying the PtSi layer, the etch-patterned TiN layer serving as local interconnects. The invention provides a PtSi Schottky diode on a bipolar transistor in combination with a TiN local interconnect with the advantages of (i) providing a TiN local interconnect which can be etched without also etching the PtSi, (ii) permitting a wide process window for overetching at contacts, (ii) a TiN local interconnect which is an improvement over a polysilicon local interconnect, and (iv) a high barrier Schottky diode for clamping a bipolar transistor.


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