The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 07, 1994

Filed:

Oct. 09, 1991
Applicant:
Inventors:

Joanne M Davidson, Poughkeepsie, NY (US);

George Hrebin, Jr, Verbank, NY (US);

Robert K Lewis, Wappingers Falls, NY (US);

Carl H Orner, Newburgh, NY (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
364488 ; 364507 ;
Abstract

A method for the characterization of large scale wafer topography is applied to improving yields in the manufacture large scale integrated (LSI) devices. First, the heights at the center, the edge and an intermediate point are measured on eight equally spaced radii. This provides eight values each for Y.sub.s and Y.sub.e which are averaged. Then the shape angle .alpha. is computed using the following equation: ##EQU1## The shape magnitude M is also computed using the following equation: ##EQU2## The thus computed values of .alpha. and M are correlated with individual wafer characteristics as to device performance and yield. Based on these results, the wafer processing is controlled to provide optimal wafer yield and isolation characteristics.


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