The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 26, 1994

Filed:

Oct. 31, 1990
Applicant:
Inventors:

William E O'Mara, Jr, Kingston, NH (US);

James D Beasom, Melbourne Village, FL (US);

Assignee:

Harris Corporation, Melbourne, FL (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
437 39 ; 437 62 ; 257280 ;
Abstract

A MESFET wherein a Schottky top gate which extends across the channel region between the source and drain regions and beyond sides of the dielectric isolation in which the device is built at two points. The bottom gate also extends beyond the dielectric isolation below the surface of the island and intersects the bottom of the source and drain regions. Where a bottom gate contact region forms an annulus encompassing the source and drain, the top gate extends across the channel and only onto sides of the bottom gate contact region at two points. The source and drain regions which are formed are sufficiently spaced from the dielectric isolation so as not to effect the I.sub.DSS resulting from variation in the island size.


Find Patent Forward Citations

O'Mara, Jr, William. (1994). Method of making silicon mesfet for dielectrically isolated integrated (U.S. Patent No. 5306650). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5306650

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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