Memory having ferroelectric capacitors polarized in nonvolatile mode

Abstract

A semiconductor memory device comprises a ferroelectric capacitor, a voltage output circuit for outputting a first voltage for reversely polarizing the ferroelectric capacitor and a second voltage by which the polarization of the ferroelectric capacitor is not reversed, regardless of data stored in the ferroelectric capacitor, a first reference capacitor having a such a capacitance as to accumulate less charge than charge which the ferroelectric capacitor accumulates, when the second voltage is applied to the ferroelectric capacitor, a second reference capacitor having such a capacitance that as to accumulate greater charge than the charge which the ferroelectric capacitor accumulates while the ferroelectric capacitor is forwardly polarized, when the first voltage is applied to the ferroelectric capacitor, thus reversely polarizing the ferroelectric capacitor, a sense amplifier connected to the ferroelectric capacitor and the first or second reference capacitor, a reference-capacitor selecting circuit for connecting the first reference capacitor to the sense amplifier when the voltage output circuit outputs the second voltage, and connecting the second reference capacitor to the sense amplifier while the voltage output circuit outputs the first voltage, and a circuit for determining data from the presence or absence of an electric charge in the ferroelectric capacitors while the memory is set in volatile mode, and for determining data from the direction in which the ferroelectric capacitor is polarized, while the memory is set in nonvolatile mode.