The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 22, 1994
Filed:
Mar. 13, 1992
Ching S Jeng, San Jose, CA (US);
Ping Wang, Saratoga, CA (US);
Silicon Storage Technology, Inc., Sunnyvale, CA (US);
Abstract
An electrically programmable and erasable floating gate memory array device is disclosed. The array has a plurality of column address lines, a plurality of row address lines, and a plurality of common source lines. Each of the memory cells has one terminal connected to one of the column address lines, another one connected to one of the row address lines, and a third connected to one of the common source lines. By appropriate selection circuit, a high voltage source can be connected to either the row address line to effect erasure of charges on the floating gate of the memory cells connected to the selected row address line or to the common source line to selectively program the memory cells connected to the associated common source line. In this manner, write disturbance can be limited.