The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 25, 1994

Filed:

Feb. 14, 1992
Applicant:
Inventors:

Peter H Sorrells, Chandler, AZ (US);

Ned D Garinger, Tempe, AZ (US);

Assignee:

VLSI Technology, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
307606 ; 307603 ; 328 55 ;
Abstract

A compensated digital delay semiconductor device is disclosed which uses two identical chains of delay elements. The first chain is the Reference Chain, which is driven by a crystal-controlled digital clock input. The second chain is the Input Signal Delay Chain, which is the delay path for the signal of interest. These two chains are located in physical proximity on the semiconductor die so that variations in the manufacturing process, temperature and power supply affect each chain the same. Circuitry monitors the delay performance of the Reference Chain, and dynamically changes the output tap of the Input Signal Delay Chain when a change in performance is detected on the Reference Chain, thereby compensating the delay of the device. This approach provides precise delays which are constant.


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