The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 05, 1993
Filed:
May. 06, 1991
Applicant:
Inventor:
Gregg Josephson, Aloha, OR (US);
Assignee:
Lattice Semiconductor Corporation, Hillsboro, OR (US);
Primary Examiner:
Int. Cl.
CPC ...
G11C / ; G11C / ;
U.S. Cl.
CPC ...
365 72 ; 307468 ; 34082583 ; 365185 ; 36518908 ;
Abstract
A non-volatile, erasable and programmable interconnect cell which includes a pass transistor, a select transistor, and a floating gate transistor wherein a voltage applied to the pass transistor is drawn from a common connection between the floating gate transistor and the select transistor.
Quick Actions:
Josephson, Gregg. (1993). Non-volatile erasable and programmable interconnect cell (U.S. Patent No. 5251169). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5251169
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