Method for setting test voltages in a flash write mode

Abstract

A method is provided for flash writing to multiple cells of a memory array. Initially, a first set of word lines, each of which controls connection of a memory cell of a first set of memory cells to a first bit line of a bit line pair, is turned on. The voltage between the two bit lines of the bit line pair is then equalized so that the charge on the first bit line of the bit line pair is higher than the charge on the second bit line of the bit line pair. Next, a sense amplifier attached to the bit line pair is turned on to sense a difference in charge between the bit line pair and to charge the first set of memory cells. Then a second set of word lines, each of which controls connection of a memory cell of a second set of memory cells to the second bit line is turned on. Finally, the word lines previously turned on are shut off and then the sense amplifier is shut off. Additionally, an apparatus is provided which allows for: turning on multiple word lines at one time, keeping an equalization means on until after at least one set of word lines have gone on, and controlling the operation of the sense amplifier to turn on and shut off at appropriate times.