The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 24, 1993

Filed:

Sep. 13, 1991
Applicant:
Inventors:

Paul W Cotues, Yorktown Heights, NY (US);

Paul A Moskowitz, Yorktown Heights, NY (US);

Philip Murphy, New Fairfield, CT (US);

Mark B Ritter, Brookfield, CT (US);

George F Walker, New York, NY (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H05K / ; H01L / ;
U.S. Cl.
CPC ...
361744 ; 361729 ; 257686 ; 437209 ;
Abstract

An electronic device packaging structure is described wherein an electronic device is electrically connected to a substrate wherein the electronic device subtends a non-normal angle with respect to the substrate. In a more specific embodiment, a plurality of electronic devices are stacked at offset with respect to each other to expose contact locations on the surface of each electronic device at an edge of each electronic device to form a stepped surface exposing a plurality of electronic device contact locations. This surface is disposed against a substrate having a plurality of contact locations thereon. The electronic device contact locations can be electrically interconnected to the substrate contact locations by solder mounds or alternatively by a cylindrical shaped elastomeric body having metallization bands with a spacing corresponding to the electronic device contact locations. The elastomeric body is pressed between the edge of the stacked electronic devices having the contact locations thereon and substrate surface to form electrical interconnections between electronic device contact locations and substrate contact locations through the electrically conducting bands. The stacked electronic devices can be thermally connected to a heat dissipation member. The stacked electronic devices can have a stepped surface embodying an enhanced area for transfer of heat from the electronic device stack to the heat dissipation member.


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