Multi-chip solid-state image sensing device

Abstract

The solid-state image sensing device comprises N-piece photodiodes (2.sub.i) for converting optical signals to electric signals; N-piece buffers (3.sub.i) for detecting the converted electric signals, respectively; a shift register having a plurality of series-connected transfer stages (8.sub.i) for generating a read pulse (9.sub.i) on the basis of a control pulse (8.sub.i) at a predetermined timing and transmitting another control pulse (8.sub.i+) to the succeeding stage at another predetermined timing, respectively; a dummy transfer stage (6.sub.0) of the same structure as the shift register transfer stages, for transmitting a control pulse (8.sub.1) to the first shift register transfer stage in response to an external control pulse (8.sub.0) at another predetermined timing; a common output line (10); and N-piece select gates (5.sub.i) for outputting a detection signal of the buffer (3.sub.i) to the common output line on the basis of the read pulse (9.sub.i), respectively. Since control pulses (8.sub.i) applied to the respective transfer stages (6.sub.i) of the shift register can be generated internally from the dummy transfer stage and the preceding transfer stages of the shift register of the same structure, the waveforms of the control pulses can be equalized, thus improving the S/N ratio of the detected image signals.