Store rounding in a floating point unit

Abstract

Apparatus for converting to a single precision or double precision number an extended precision floating point number comprised of a sign field, an exponent field and a mantissa field. A sticky generation logic connected to the mantissa bus calculates rounding bits for single and double precision and places the rounding information at a sticky output. Overflow and underflow detection logic connected to the exponent bus detects exponent overflow and underflow and generates an overflow output signal. Rounding and conversion control logic connected to the sticky output utilizes the type of conversion that has been specified and the rounding information at the sticky output for producing conversion controls at a control output and a conversion type signal output. A positional incrementer connected to the exponent bus, to the mantissa bus, and to the rounding and conversion control logic places on an incrementer output, the incremented number in response to the conversion type signal output of the rounding and conversion control logic. A conversion mux is connected to the exponent bus, to the mantissa bus, to the output of the positional incrementer and to the control output of the rounding and conversion control logic. In response to the control output of the rounding and conversion control logic means, the conversion mux places either the exponent bus and the mantissa bus, or the output of the positional incrementer means on a conversion output of the conversion mux.