The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 13, 1993
Filed:
Mar. 09, 1990
Vishwani D Agrawal, New Providence, NJ (US);
Kwang-Ting Cheng, Edison, NJ (US);
AT&T Bell Laboratories, Murray Hill, NJ (US);
Abstract
A testable implementation of a given finite state machine is produced by defining a test finite state machine which can set and read the same number of flip flops as are required for the memory elements of the given finite machine and then merging the test finite state machine with the given finite state machine to produce a testable finite state machine in which the test finite state machine and the given finite state machine share the flip flops. The testable implementation is then produced from the testable finite state machine. Since the test finite state machine and the given finite state machine share the flip flops of the testable implementation, the test finite state machine can be used to test the given finite state machine by setting and reading the given finite state machine's flip flops. Techniques are further disclosed for defining the test finite state machine and merging the test finite state machine with the given finite state machine.