The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 08, 1993
Filed:
Jan. 23, 1992
Rodney Langley, Boise, ID (US);
Micron Technology, Inc., Boise, ID (US);
Abstract
Disclosed is a method of passivating a semiconductor wafer having an array of substantially parallel conductive metal runners which are predominantly spaced a defined distance apart relative to adjacent runners throughout the array and which have a predominant height throughout the array. The method includes, a) depositing a first layer of a passivation dielectric insulating material atop the wafer to a selected maximum thickness between the metal runners, the selected maximum thickness being less than the defined distance between adjacent metal runners; b) depositing a layer of photoresist atop the wafer to a selected thickness sufficient to cover the first passivation layer elevationally above the metal runners; c) etching the photoresist and first passivation layer to remove dielectric insulating material from above the metal runners and not remove dielectric insulating material from between the metal runners; d) stripping photoresist from the wafer; and e) depositing a second layer of a passivation dielectric insulating material atop the wafer to a selected thickness sufficient to fill all gaps between adjacent metal runners.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile