The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 11, 1993
Filed:
Nov. 26, 1991
Takayuki Niuya, Tsukuba, JP;
Yoshihiro Ogata, Tsuchiura, JP;
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
Substrate bias generating circuit for MIS semiconductor device comprising an oscillating circuit, a capacitor, an MOS transistor and a Schottky barrier diode. One end of the oscillating circuit is connected to a V.sub.ss terminal which provides a reference potential. The capacitor is connected at one end thereof to the other end of the oscillating circuit. The MOS transistor is connected between the V.sub.ss terminal and the other end of the capacitor, with the Schottky barrier diode being connected between a node located between the other end of the capacitor and the MOS transistor, and the substrate. The Schottky barrier diode is operated by the majority carrier, thereby enabling the majority charge to be directly pumped out of the substrate and into the terminal V.sub.ss through the Schottky barrier diode with stability without requiring an injection of the minority charge into the semiconductor substrate. The pumping of the charge out of the substrate is permitted by lowering the potential of the node through the oscillating circuit.