Dual-ranked time-interval conversion circuit

Abstract

A dual-ranked time-interval conversion circuit. Two time trap circuits are employed to convert the time interval between a logic level transition of a first signal and a logic level transition of a second signal to an analog or digital signal representative of that time interval. Each time trap circuit employs a delay line for receiving and propagating the first signal and a series of taps and respective storage elements along the delay line for detecting and storing the logic level of the delay line at each tap at the time of receipt of a second signal. A first time trap circuit is employed to measure the time interval in course quanta of time and a second time trap circuit is employed to measure in fine quanta of time the time difference between the actual first signal-to-second signal time interval and the coarse measurement of that interval. A nulling circuit is provided for applying a delayed strobe signal to the second time trap circuit within a predetermined period of time following receipt of the first signal. This time is preferably equal to two coarse time quanta to allow for quantizing error. Delay circuits are provided to compensate for signal propagation delay through circuit devices. The outputs of the first and second time trap circuits are applied to a digital-to-analog conversion circuit or to a digital decoding circuit for producing an analog or digital output, respectively.