Nonvolatile semiconductor memory and a memory of manufacturing the same

Abstract

In a semiconductor integrated circuit comprising an array of memory cells of floating gate type MOS transistors, an insulating film is formed on the top surface and the side walls of the gate electrode portion. The insulating films on the side walls serve as an offset region of a channel contacting with the drain region. The side end portions of the drain region, contacting the channel region has a lower impurity concentration than the remaining portion of the drain region. A conductive layer covers the surface of the drain region and at least the insulating films on the side walls of the gate electrode, which upstands above both ends of the drain region. A metal interconnection layer is deposited on the conductive layer. In a method of manufacturing a semiconductor integrated circuit, an array of memory cells each comprising a floating gate type MOS transistor is formed on a semiconductor substrate, insulating films are fomred on the top surface and the side walls of a gate electrode portion located above both ends of a drain region of the transistor. A conductive film covering the surface of the drain region and at least the insulating films is formed on the side walls of the gate electrode located above both ends of the drain region. An interlayer insulating film is formed over the entire major surface of the structure. A contact hole is formed by selectively etching the interlayer insulating film with a stopper of the conductive film. Finally a metal interconnection pattern is formed on the substrate containing the contact hole.