The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 12, 1993
Filed:
Apr. 08, 1992
Masashi Horiguchi, Kawasaki, JP;
Masakazu Aoki, Tokorozawa, JP;
Kiyoo Itoh, Higashikurume, JP;
Yoshinobu Nakagome, Hachioji, JP;
Norio Miyake, Higashimurayama, JP;
Takaaki Noda, Kodaira, JP;
Jun Etoh, Hachioji, JP;
Hitoshi Tanaka, Tachikawa, JP;
Shin'ichi Ikenaga, Koganei, JP;
Abstract
Practical structures of an ultra large scale semiconductor integrated (ULSI) circuit especially a dynamic random access memory of 16 M bits or more are involved. The ULSI circuit uses internal operating voltages and how to construct a reference voltage generating circuit and a voltage limiter circuit in the ULSI circuit is a matter of importance. The operation of the reference voltage generating circuit and voltage limiter circuit can be stabilized, characteristics of these circuits are improved, and layout of these circuits as applied to memory cell array, peripheral circuits and the like can be improved. Improved methods of testing these circuits are provided.