The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 29, 1992

Filed:

Apr. 03, 1991
Applicant:
Inventor:

George Wong, Singapore, SG;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
437188 ; 437194 ; 437198 ; 437199 ; 437246 ; 437247 ;
Abstract

The method of forming a highly conductive electrical contact to a semiconductor region of an integrated circuits device is described. An opening to the semiconductor region is provided through an insulating layer. A thin first layer of aluminium having a first grain size is sputter deposited over and in the opening covering the surface of the semiconductor region. A second layer of aluminium having a second and substantially different grain size from the thin first layer of aluminium is sputter deposited thereover. The resulting aluminum structure is subjected in its normal process of manufacture to temperature cycling of greater than about 300.degree. C. whereby any formed silicon nodules are preferentially formed at the boundary of the thin first layer of aluminium and the second layer of aluminium. The second layer of aluminium may in one alternative completely fill the opening. In another alternative, a third layer having substantially the same grain size as the first aluminum. In this last alternative, the third layer will fill the opening to complete the electrical contact. The grain size is adjusted by the bias applied or not applied during the sputter deposition.


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