Method of fabricating semiconductor element having lightly doped drain

Abstract

A method of fabricating an insulating gate type field-effect transistor in which a region having a low carrier density for mitigating electric field is provided so as to abut on a source/drain region having a high carrier density, the method comprising the steps of: forming a gate insulating film and a gate electrode on a semiconductor substrate; depositing an insulating thin film on the gate electrode and the gate insulating film to a vertical thickness; and performing from above the insulating thin film, ion implantation at an implantation energy inducing a projected range of ions approximately equal to the vertical thickness of the insulating thin film so as to form the source/drain region; wherein a horizontal thickness of the insulating thin film on opposite sides of the gate electrode is larger than a sum of a lateral diffusion distance of the source/drain region at the time of the ion implantation and a lateral diffusion distance of the source/drain region after the ion implantation.