The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 27, 1992

Filed:

Apr. 09, 1991
Applicant:
Inventors:

Dave Kellerman, Littleton, MA (US);

Robert J Hannemann, Wellesley, MA (US);

Stanley J Czerepak, Burlington, MA (US);

Robert J Simcoe, Westborough, MA (US);

Assignee:

Digital Equipment Corporation, Maynard, MA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ; H02B / ;
U.S. Cl.
CPC ...
437218 ; 437197 ; 437203 ; 437209 ; 437902 ; 357 80 ; 357 81 ; 361385 ;
Abstract

An injection molded aluminum nitride heatsink forms the substrate of an integral heatsink semiconductor package in which a semiconductor chip is attached directly to the integrated heatsink forming an intimate thermal relationship between the heat generating source and the heat dissipating means. In a first embodiment, a planar surface of the heatsink component provides the substrate for the attachment of a semiconductor chip and a multilayer housing formed from a plurality of layers of dielectric glass ceramic lamina and conductive circuit layers. The multilayer housing is formed on top of the heatsink substrate creating a recessed cavity in which the semiconductor die sits and is attached directly to the heatsink. The semiconductor chip is attached to the circuit layers of the housing through any of the known electrical connection methods, such as wirebonding or tab tape. A cover plate is mounted over the cavity. In a second embodiment a recessed cavity with a planar surface is formed directly in the heatsink and the semiconductor chip is mounted directly to the surface within the cavity. A plurality of tab leads are connected to the semiconductor and a cover plate is mounted over the cavity sealing the semiconductor and its electrical connections inside.


Find Patent Forward Citations

Kellerman, Dave. (1992). Integral heatsink semiconductor package (U.S. Patent No. 5158912). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5158912

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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