The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 15, 1992

Filed:

Oct. 10, 1991
Applicant:
Inventor:

Krishna M Yellamilli, San Jose, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ;
U.S. Cl.
CPC ...
307279 ; 3072721 ; 307571 ; 307242 ; 307582 ; 307585 ;
Abstract

A data latching circuit includes a standard clock qualified transparent latch cell which receives an input data signal and an enable signal. The input data signal is also asserted at the input of a first transistor gate circuit which is controlled by the enable signal. The output of the transparent latch is asserted at the input of a second transistor gate circuit which is controlled by an inverted enable signal. The outputs of the two transistor gate circuits, only one of which is active at any time, are combined and buffered for output.


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