The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 18, 1992
Filed:
May. 23, 1989
Kunio Uchiyama, Hachioji, JP;
Hirokazu Aoki, Hachioji, JP;
Susumu Hatano, Musashino, JP;
Kanji Oishi, Koganei, JP;
Takashi Kikuchi, Akishima, JP;
Hiroshi Fukuta, Kodaira, JP;
Yasuhiko Saigou, Fuchu, JP;
Hitachi, Ltd., Tokyo, JP;
Hitachi VLSI Engineering Corp., Tokyo, JP;
Abstract
A main memory is subdivided into a shared region to undergo a write access from a plurality of processors and an input/output device and a plurality of private regions to undergo a write access only from the associated processor. Each of the cache devices includes a region discriminating circuit for determining whether an address generated from the processor is to be employed for an access to the shared region or to the private regions. If the access is to be conducted to the shared region, the cache devices operate according to the write-through method. On the other hand, if the access is to be conducted to the private region, the cache devices operate according to the copy-back method. When the processor or the input/output device rewrites data in the shared region of the main memory, the stored data of the shared region in the cache device of the processor is invalidated.