The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 04, 1992
Filed:
Apr. 13, 1989
Applicant:
Inventors:
Donald L Wollesen, Saratoga, CA (US);
Craig S Sander, Cupertino, CA (US);
Jacob D Haskell, Palo Alto, CA (US);
Assignee:
Advanced Micro Devices, Inc., Sunnyvale, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
357 67 ; 357 71 ; 357-2 ;
Abstract
A low resistance interconnect structure for integrated circuits formed by a composite layer of aluminum below and an amorphous compound of refractory metal and silicon above. In the process of manufacturing the interconnect structure, care must be taken so that an aluminum oxide layer is not formed between the aluminum and compound layers.
Wollesen, Donald. (1992). Stratified interconnect structure for integrated circuits (U.S. Patent No. 5136361). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5136361
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile