The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 14, 1992
Filed:
Jul. 06, 1989
Abstract
A technique utilizing conventional photolithography to manufacture GaAs MESFET devices having sub-micrometric gate and variable length recessed channel. The structure of these devices consists of two photopolymeric layers separated by a metal interface. The upper, stencil layer sets the aperture of the submicrometric gate. The lower planarizing layer defines the recessed channel, through the metal interface, which acts as a template. The length of such channel may be varied through suitable choice of exposure time of the planarizing photopolymer. By adopting such multilayer structures it is possible to obtain gate lengths of .about.b .mu.m and recessed channel lengths form 0.8 to 3 .mu.m, with a process yield typically better than 90%, simultaneously. Furthermore, by using a thicker planarizing layer in this structure it is possible to obtain a relatively thick metal deposit (typically about 0.8 .mu.m), such as a Ti/Pt/Au overlayer over ohmic contacts and gate pads.