The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 02, 1992
Filed:
Dec. 19, 1989
Applicant:
Inventors:
James R Todd, Plano, TX (US);
David R Cotton, Plano, TX (US);
Taylor R Efland, Richardson, TX (US);
John K Lee, Dallas, TX (US);
Roy C Jones, III, Dallas, TX (US);
Assignee:
Texas Instruments Incorporated, Dallas, TX (US);
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
357 43 ; 357 234 ; 357 2313 ; 357 42 ;
Abstract
Methods and circuits of integrated DMOS, CMOS, NPN, and PNP devices include self-aligned DMOS (411) with increased breakdown voltage and ruggedness for recovery from transients including additional Zener diodes (402/474).
Todd, James. (1992). Integrated power dmos circuit with protection diode (U.S. Patent No. 5119162). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5119162
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile