The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 14, 1992

Filed:

Jul. 30, 1990
Applicant:
Inventor:

Douglas B Butler, Colorado Springs, CO (US);

Assignees:

Ramtron Corporation, Colorado Springs, CO (US);

NMB Semiconductor Company, Ltd., , JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ;
U.S. Cl.
CPC ...
437 52 ; 437 60 ; 437193 ; 437919 ;
Abstract

In a multi-layered integrated memory circuit, a method for using sacrificial layers and insulating 'sticks' is disclosed to provide a contact between two layers, where the contact does not short to an intervening layer. This invention provides this with minimal extra processing by using sacrificial layers with appropriate etch and etch stop properties. As these layers are etched, additional layers which alternate in the same conducting/insulating pattern are exposed. Each etch stops on either a conductive or insulative layer. A contact layer may then be deposited which connects the uppermost capacitor plate to the pass transistor of the memory cell.


Find Patent Forward Citations

Butler, Douglas. (1992). Method for creating self-aligned, non-patterned contact areas and (U.S. Patent No. 5104822). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5104822

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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