The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 24, 1992
Filed:
Feb. 15, 1989
Peter J Osler, Jericho, VT (US);
Fred T Tong, Hopewell Junction, NY (US);
International Business Machines, Armonk, NY (US);
Abstract
A system providing a guess mechanism for improving the speed of translating effective addresses produced by a processor to real addresses in memory is disclosed wherein a set of Lookaside Tables and logic elements are used along with a set of validity registers and an MRU register to guess at the appropriate real frame index from one of the Tables to be output in the real address in the first cycle of a two cycle operation. The low order bits of the effective address are sent to index the Tables during the first cycle and the high order bits are used during the second cycle for comparison with the set of Table entries selected in the first cycle as containing the real frame index that is output. The selection of the actual real frame index that is output involves a guess using the validity and MRU registers along with indexing of the Tables by a portion of the low order bits. If the logic indicates, upon comparison of 1) the Table entry containing the real frame index that is output during the first cycle with 2) the high order bit comparison of the second cycle, that the selected real frame index was inappropriate, a signal is sent after the second cycle to invalidate the output of the real address incorporating that real frame index.