The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 14, 1992

Filed:

Mar. 07, 1991
Applicant:
Inventors:

George V Rouse, Indialantic, FL (US);

Paul S Reinecke, Indialantic, FL (US);

Assignee:

Harris Corporation, Melbourne, FL (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
437 62 ; 437 86 ; 437974 ;
Abstract

A method including filling etched moats with a first dielectric layer and layer of polycrystalline material and planarizing. A second dielectric layer is formed on the first polycrystalline layer and a second layer of polycrystalline is formed on the second dielectric layer to form a handle. The starting material is then thinned to produce the dielectric isolated islands. Device forming steps are then performed. Finally, the handle is removed leaving a wafer having a thickness defined by the planarized surface of the first polycrystalline layer and the top surface of the first wafer.


Find Patent Forward Citations

Rouse, George. (1992). Manufacturing ultra-thin dielectrically isolated wafers (U.S. Patent No. 5081061). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5081061

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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