The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 07, 1992

Filed:

Feb. 07, 1989
Applicant:
Inventor:

Noriaki Sato, Machida, JP;

Assignee:

Fujitsu Limited, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ; H01L / ;
U.S. Cl.
CPC ...
3652257 ; 365149 ; 365181 ;
Abstract

A semiconductor memory circuit comprises a plurality of memory cells and a plurality of programming transistors, each memory cell being provided at the intersections of one bit line and one word line. The memory cell includes an insulator and a cell transistor, and a conductivity type of the cell transistor selected by a word line select signal is opposite to that of the programming transistor selected by a bit line select signal. The memory cell is programmed by utilizing an electrical breakdown of the insulator, when the bit line select signal and the word line select signal supplied are in-phase and both the programming transistor and the cell transistor are switched. Therefore, the memory cell is programmed in a short time during which the programming transistor and the cell transistor are switched, and thus this semiconductor memory circuit can be programmed with a low consumption of power and of a high speed.


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