The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 24, 1991

Filed:

Nov. 28, 1988
Applicant:
Inventors:

Masatoshi Yano, Kanagawa, JP;

Hideki Usuki, Kanagawa, JP;

Shumpei Kohri, Kanagawa, JP;

Hiroshi Ishida, Kanagawa, JP;

Assignee:

Sony Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
365190 ; 36518909 ; 365203 ;
Abstract

A static random access memory (SRAM) includes a pair of p-channel metal-oxide-semiconductor (PMOS) transistors which serve as variable resistors for terminating bit lines and a control circuit for causing the PMOS transistors to have a low impedance level during read out and an intermediate impedance level during writing so that sudden d.c. current is suppressed and the voltage at the bit lines is prevented from being lowered. The variable resistor device can constitute a current mirror circuit along with a metal-insulator-semiconductor (MIS) transistor of the control circuit, so that it becomes possible to provide a stable control which is invulnerable to manufacturing tolerances.


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