The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 29, 1991
Filed:
Jun. 12, 1989
Hideo Meguro, Tachikawa, JP;
Yoshiaki Yoshiura, Irving, TX (US);
Tatsuo Itagaki, Hinode, JP;
Ken Uchida, Higashiyamato, JP;
Tsuneo Satoh, Tachikawa, JP;
Seiichi Ichihara, Hachioji, JP;
Koichi Nagasawa, Irving, TX (US);
Hitachi, Ltd., Tokyo, JP;
Hitachi Microcomputer Engineering Ltd., Tokyo, JP;
Abstract
With the reduction in the size of semiconductor integrated circuit devices, there have been increases in the resistance at the contact portions of metal interconnections and in the incidence of contact failure. To solve these problems, the present invention provides a novel interconnection structure. Namely, a metal interconnection which has a barrier metal layer formed thereunder and which is also used to form electrode lead-out portions for external connection is arranged such that, among the following portions, that is, electrode portions of a plurality of elements fabricated on a semiconductor substrate in the form of an integrated circuit, interconnection portions between these elements, and the above-described electrode lead-out portions for external connection, those portions of the interconnection layer which are defined as the electrode portions of the elements and the interconnection portions are isolated from the semiconductor substrate by means of a barrier metal layer, while those portions of the interconnection layer which are defined as the electrode lead-out portions for external connection are formed not through the barrier metal layer but directly on the interlayer insulating layer.