The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 24, 1991
Filed:
Feb. 22, 1990
Applicant:
Inventor:
Yong-Bo Park, Busan, KR;
Assignee:
Samsung Electronics Co., Ltd., Suweon, KR;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
307475 ; 307448 ; 307443 ; 307264 ;
Abstract
A level converter for converting a TTL level of an input signal to a CMOS level comprises a NOR gate circuit (1), including a first voltage pull-up PMOS transistor (PI2), to which the TTL signal is inputted, an inverter (INV) connected to the NOR gate circuit, and a speed control circuit (2). The speed control circuit includes a second voltage pull-up PMOS transistor (PI4), and means are provided for connecting the first and second transistors in parallel between VCC and the input to the inverter. A fast conversion speed is obtained by turning on both PMOS transistors (PI2, PI4) when the TTL signal goes from the high level to the low level.